Low power pre-discharged ratio logic

Electronic digital logic circuitry – Clocking or synchronizing of logic stages or gates – Field-effect transistor

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326 98, 326 83, 326108, H03K 1900

Patent

active

055721508

ABSTRACT:
A circuit and method are provided for reducing the DC power consumption of clocked ratioed digital logic circuits. The circuit includes switching circuitry designed to analyze the voltage transitions of a ratioed digital logic circuit and based on such transitions, control the DC current flow through the entire circuit. Through the regulation of DC current flow through a digital logic circuit, the present invention reduces the detrimental effects of hot-electron effects and electromigration concerns which cause digital circuitry to fail. The circuit and method are illustrated by way of a ratioed logic NOR function employing MOSFET technology.

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