Method of making dielectric and conductive isolated island

Details Method of making dielectric and conductive isolated island Method of making dielectric and conductive isolated island

Filed on

1992-09-28

Date issued

1993-12-07

Examiner

Fourson, George

Patent Class

Fishing, trapping, and vermin destroying

Other Related Categories

437914, 437203, 148DIG12, 148DIG135, H01L 2176

Type

Patent

Status

active

Patent number

052683265

Description

ABSTRACT:
A dielectric and conductive isolated island is fabricated by providing an active wafer having a first and a second major surface, a doped region extending from the first surface, and a trench formed at the first surface. A conductive layer is formed on the first surface and in the trench. A planarizable layer comprised of a dielectric layer is then formed on the conductive layer. A handle wafer is bonded to the planarizable layer. The active wafer and the handle wafer are heated so that the doped region diffuses along the conductive layer to form an equalized concentration of dopant along the conductive layer which diffuses into the active wafer to form the doped region adjacent all of the conductive layer. A portion of the second surface of the active wafer is then removed so that at least a portion of the dielectric layer of the planarizable layer is exposed.

REFERENCES:
patent: 3508980 (1970-04-01), Jackson et al.
patent: 4839309 (1989-06-01), Easter et al.
patent: 5013681 (1991-05-01), Godbey et al.
patent: 5091330 (1992-02-01), Cambou et al.
Haisma, J., "Silicon on Insulator . . . Evaluations", Jap. J. Appl. Phys., vol. 28, No. 8 (1989) pp. 426-443.

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