Switchable multi bit semiconductor memory device

Static information storage and retrieval – Read/write circuit

Patent

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Details

365149, G11C 1604

Patent

active

061046418

ABSTRACT:
In a switchable multi bit DRAM, in addition to main bit line pair and a main sense amplifier, sub bit line pair and a sub sense amplifier are provided. Between the main bit line pair and the sub bit line pair, transistors are connected, and a transistor, a reference capacitor and a transistor are connected between the main bit line and the complementary sub bit line. By controlling these components, it becomes possible to use the memory cell as a 4-value memory or a binary memory. Therefore, storage capacity and power consumption can be switched.

REFERENCES:
patent: 5841695 (1998-11-01), Wik
patent: 5970007 (1999-10-01), Shiratake
patent: 5982657 (1999-11-01), Kong

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