Method for forming dummy pattern areas in a semiconductor device

Details Method for forming dummy pattern areas in a semiconductor device Method for forming dummy pattern areas in a semiconductor device

1998-04-22

2000-08-15

Utech, Benjamin L.

Semiconductor device manufacturing: process

Chemical etching

Combined with the removal of material by nonchemical means

438692, 257758, 257760, H01L 21302, H01L 2352

Patent

active

061036269

ABSTRACT:
A method is provided for forming a dummy pattern in a semiconductor device. The dummy pattern areas are formed only in some areas of the substrate in which conductive layer pattern areas are not formed. In particular, the distances by which the dummy pattern areas are separated from the conductive layer pattern areas are determined by controlling the magnitude by which the conductive layer pattern areas are enlarged during the process of defining the dummy pattern area on the substrate. Widths of dummy pattern areas can also be predetermined. Dummy pattern areas may be selectively formed in a substrate by combining the dummy pattern areas where adjacent portions of dummy pattern areas are less than a predetermined distance from each other and additional dummy pattern areas may be formed adjacent to dummy pattern areas vulnerable to over-etching. Accordingly, it is possible to reduce damage to the conductive layer pattern areas during over-etching and CMP process and to reduce the parasitic capacitance between the conductive layer pattern areas and underlying conductive layer pattern areas. Leakage current and the possibility of misoperation of the semiconductor device are thus reduced.

REFERENCES:
patent: 5220199 (1993-06-01), Owada et al.
patent: 5289422 (1994-02-01), Mametani
patent: 5357140 (1994-10-01), Kosasa
patent: 5430325 (1995-07-01), Sawada et al.
patent: 5459093 (1995-10-01), Kuroda et al.
patent: 5529954 (1996-06-01), Iijima et al.
patent: 5556805 (1996-09-01), Tanizawa et al.
patent: 5652465 (1997-07-01), Hosoda et al.

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