Method for producing dynamic semiconductor memory cells with ran

Details Method for producing dynamic semiconductor memory cells with ran Method for producing dynamic semiconductor memory cells with ran

1982-12-13

1983-11-08

Powell, William A.

Adhesive bonding and miscellaneous chemical manufacture

Delaminating processes adapted for specified product

Delaminating in preparation for post processing recycling step

29580, 148187, 156651, 156657, 1566591, 357 59, B44C 122, C03C 1500, C03C 2506

Patent

active

044140584

ABSTRACT:
The invention provides a method of manufacturing dynamic semiconductor memory cells having random access (RAM) in accordance with the double polysilicon gate technology, with which insulation of adjacent, active regions occurs by thick oxide regions, produced according to known LOCOS technology and with which, for increasing cell capacity, a boron and arsenic ion implantation is executed into the memory region with the use of a photoresist mask. In order to increase component density, the oxide thickness in the memory region/thick oxide transistor region is reduced in a multi-stage etching sequence, axially as well as laterally, so that a gain of about 25% in memory surface and a gain of more than 10 volts in blocking bias is achieved. The inventive method is particularly useful in the production of LSI Si.sup.2 gate RAM memories.

REFERENCES:
patent: 4075045 (1978-02-01), Rideout
patent: 4313256 (1982-02-01), Widmann
patent: 4335502 (1982-06-01), Richman
C. N. Ahlquist et al., "A 16 384-Bit Dynamic RAM", IEEE Journal of Solid-State Circuits, vol. SC-11, Oct. 1976, pp. 570-573.
S. Matsue et al., "A 256K Dynamic RAM", Conference Volume, ISCCC 1980, Digest of Technical Papers, Feb. 1980, pp. 232-233.
J. A. Appels et al., "Local Oxidation of Silicon, New Technological Aspects", Philips Research Reports, vol. 26, No. 3, Jun. 1971, pp. 157-165.
A. F. Tasch et al., "The Hi-C RAM Cell Concept", IEEE Transaction On Electron Devices, vol. ED-25, Jan. 1978, pp. 33-41.

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