Method of forming a contact hole in a semiconductor device

Details Method of forming a contact hole in a semiconductor device Method of forming a contact hole in a semiconductor device

1998-07-24

2000-08-15

Dutton, Brian

Semiconductor device manufacturing: process

Making passive device

Stacked capacitor

438253, 438254, 438255, 438256, 438296, 438298, 438297, 438637, 438638, 438639, 438396, 438397, 438398, 438399, 438400, H01L 2120

Patent

active

061035882

ABSTRACT:
The present invention includes forming a first conductive layer on a semiconductor substrate, and forming a first dielectric layer on the first conductive layer. After patterning to etch the first dielectric layer and the first conductive layer, a second dielectric layer is formed on the semiconductor substrate and the first dielectric layer. Next, the second dielectric layer is anisotropically etched back to form a spacer on sidewalls of the first dielectric layer and the first conductive layer. A first silicon oxide layer is then formed over the semiconductor substrate, the first dielectric layer, and the spacer, followed by forming a photoresist layer on the first silicon oxide layer. A predetermined thickness of the first silicon oxide layer is removed by using the photoresist layer as a mask, and a polymer layer is then formed on the photoresist layer and the first silicon oxide layer. The polymer layer is anisotropically etched back to form a polymer spacer on sidewalls of the photoresist layer and the first silicon oxide layer. The first silicon oxide layer is then anisotropically etched back by using the polymer spacer as a mask to expose surface of the semiconductor substrate, wherein the spacer and the first dielectric layer are used for facilitating self-aligned etching. A second conductive layer is formed over the semiconductor substrate, surface of the second silicon oxide layer being exposed, and a second silicon oxide layer is formed over the second conductive layer and the first silicon oxide layer. Finally, a portion of the second silicon oxide layer is patterned to expose a portion of the second conductive layer, thereby forming the contact hole in the second oxide layer.

REFERENCES:
patent: 5904521 (1999-04-01), Jeng et al.
patent: 6015983 (2000-01-01), Parekh
patent: 6033966 (2000-03-01), Linliu

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