Enabling circuit for redundant word lines in a semiconductor mem

Static information storage and retrieval – Read/write circuit – Bad bit

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365210, G11C 1140

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active

045382450

ABSTRACT:
A semiconductor memory having back-up storage devices arranged along redundant word lines to replace defective storage devices located in the primary array of the memory. The memory includes a redundant decoder for enabling the redundant word lines in response to a selected address and a redundancy disable circuit for generating a signal indicative of redundant word line use.

REFERENCES:
patent: 4250570 (1981-02-01), Tsang et al.
W. F. Beausoleil, "Utilization of Defective Memory Chips by Substituting Redundant Words for Defective Words", IBM Tech. Disc. Bull., vol. 15, No. 6, Nov. 1972, pp. 1864-1865.

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