DRAM having bidirectional global bit lines

Details DRAM having bidirectional global bit lines DRAM having bidirectional global bit lines

1993-03-18

1994-11-22

LaRoche, Eugene R.

Static information storage and retrieval

Read/write circuit

365202, 365203, 365207, 36523003, G11C 700

Patent

active

053674880

ABSTRACT:
A DRAM having bidirectional global bit lines is defined such that local bit lines connected to corresponding memory cells and separative global bit lines connected to the local bit lines are commonly connected to local bit lines so as to read data stored in the cells or write data to the cells in a bidirectional data access manner. According to the DRAM of the present invention, the sense amplifiers, input and output lines and switching elements for column decoding, which generally are located between adjacent cell arrays, can be advantageously positioned without decreasing the characteristics of the DRAM element. In addition, the DRAM of the present invention employs an open bit line structure rather than a folded bit line structure, thereby improving a packing effect as well as a S/N (signal-to-noise) characteristic, remarkably.

REFERENCES:
patent: 5047984 (1991-09-01), Monden
patent: 5091889 (1992-02-01), Hamano et al.
patent: 5111434 (1992-05-01), Cho
patent: 5202854 (1993-04-01), Koike
patent: 5233560 (1993-08-01), Foss et al.
patent: 5247482 (1993-09-01), Kim
patent: 5255235 (1993-10-01), Miyatake

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