Separation circuit for a DRAM

Details Separation circuit for a DRAM Separation circuit for a DRAM

1990-11-20

1991-08-06

Bowler, Alyssa H.

Static information storage and retrieval

Read/write circuit

365203, 36518905, 365190, G11C 700, G11C 1140

Patent

active

050383248

ABSTRACT:
A separation circuit for a DRAM where the separation circuit comprises a first separation circuit and a second separation circuit is disclosed. The first separation circuit and the second separation circuit includes a high resistive MOSFET Q7, MOSFET Q9 and a low resistive MOSFET Q8, MOSFET Q10, respectively. The circuit enables the rapid transfer of data during the reading and writing of data to and from a selected memory cell without signal loss which results in an increased sensing ability of a sense amplifier.

REFERENCES:
patent: 4827454 (1989-05-01), Okazaki
patent: 4845681 (1989-07-01), Vu et al.
patent: 4926379 (1990-05-01), Yoshida

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