Semiconductor memory which can be prevented from shifting to und

Details Semiconductor memory which can be prevented from shifting to und Semiconductor memory which can be prevented from shifting to und

1990-12-21

1992-10-20

Fears, Terrell W.

Static information storage and retrieval

Read/write circuit

Testing

365200, G11C 1300

Patent

active

051576309

ABSTRACT:
Disclosed are an RAS input circuit (100a) and a CAS input circuit (200a) applicable to a dynamic random access memory (DRAM). The threshold voltage V.sub.TRAS of the RAS input circuit and the threshold voltage V.sub.TCAS of the CAS input circuit are settled to satisfy the relation V.sub.TRAS >V.sub.TCAS. Therefore, a L level of an external RAS signal is more easily determined by a L level of an external CAS signal. As a result, the DRAM is prevented from erroneously starting its operation under a test mode without an external request.

REFERENCES:
patent: 5088063 (1992-02-01), Matsuda et al.

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