Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Patent
1998-08-18
2000-10-24
Lintz, Paul R.
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
703 4, 703 19, G06F 1750, G06F 1710
Patent
active
061382671
ABSTRACT:
A semiconductor integrated circuit reliability verification device for detecting any portion of design that may cause circuit malfunction due to the effects of switching noise, comprises a partial circuit network detecting part for detecting, based on a transistor-level net list for the circuit to be verified, information concerning partial circuit networks that form part of a circuit to be verified, a maximum resistance calculating part for calculating, based on the information concerning the partial circuit network, the maximum resistance that occurs while the channel connected component is operating, a gate capacitance calculating part for calculating, based on the information concerning the partial circuit network, the total gate capacitance for the portions but the inverter of a driven circuit, and an error judging part for calculating the value of evaluation function, based on the value of maximum resistance and the total gate capacitance, and judging whether or not the calculated value is in violation of the design criteria.
REFERENCES:
patent: 5305299 (1994-04-01), Dhar
patent: 5481484 (1996-01-01), Ogawa et al.
patent: 5535133 (1996-07-01), Petschauer et al.
patent: 5553008 (1996-09-01), Huang et al.
patent: 5568395 (1996-10-01), Huang
patent: 5596506 (1997-01-01), Petschauer et al.
patent: 5724250 (1998-03-01), Kerzman et al.
patent: 5726903 (1998-03-01), Kerzman et al.
patent: 5845233 (1998-12-01), Fishburn
patent: 5872952 (1999-02-01), Tuan et al.
patent: 5882214 (1998-10-01), Rostoker et al.
patent: 5923569 (1999-07-01), Kumashiro et al.
patent: 5946475 (1999-08-01), Burks et al.
patent: 5999726 (1999-12-01), Ho
patent: 6029117 (2000-02-01), Devgan
patent: 6035111 (2000-03-01), Suzuki et al.
Lee et al., "Test generation for crosstalk effects in VLSI circuits", 1996 IEEE International Symposium on Circuits and Systems, 1996, ISCAS '96, Connecting the World, vol. 4, May 12, 1996, pp. 628-631.
Fourniols et al., "Measurement techniques for coupling characterization inside CMOS integrated circuits", IEEE International Symposium on Electromagnetic Compatibility, 1994, Symposium Record, Compatibility in the Loop, Aug. 22, 1994, pp. 22-26.
"ASIC Design Handbook", 1989, Science Forum Co., Ltd., pp. 179-182, Jan. 1989.
"LSI Design and Manufacturing Techniques," 1987, Denki Shoin Co., Ltd. pp. 142-147, Jan. 1987.
Kik Phallaka
Lintz Paul R.
NEC Corporation
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