Method and device for the predictive reading of a memory

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique

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711154, 711137, G06F 1200

Patent

active

061382205

ABSTRACT:
An apparatus and method for reading of a memory associated with a central processing unit that does not permit a fraudulent individual to discover the addressing codes of the memory corresponding to the performance of a particular wherein the successive codes for the addressing of the memory are deduced from one another according to a function of prediction defined by the programmer. These addressing codes are verified by the addressing circuits of the memory by means of a computation and comparison procedure that know the prediction function.

REFERENCES:
patent: 4691277 (1987-09-01), Kronstadt et al.
patent: 4864533 (1989-09-01), Hanada
patent: 4901227 (1990-02-01), Nomura et al.
patent: 5404467 (1995-04-01), Saba et al.
patent: 5602781 (1997-02-01), Isobe
patent: 5748558 (1998-05-01), Suzuki
French Search Report from French Patent Application 96 15515, filed Dec. 17, 1996.

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