Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified material other than unalloyed aluminum
Patent
1995-04-07
1996-11-26
Brown, Peter Toby
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Of specified material other than unalloyed aluminum
257757, 257763, 257764, 257773, 257915, H01L 2941, H01L 2943
Patent
active
055788726
ABSTRACT:
A method is provided for patterning a submicron semiconductor layer of an integrated circuit, and an integrated circuit formed according to the same. A first conductive structure is formed over the integrated circuit. A dielectric is formed over the first conductive structure having a contact opening exposing a portion of the underlying first conductive layer. A barrier layer is formed in the bottom of the contact opening. A second, substantially conformal conductive layer is formed by chemical vapor deposition over the dielectric layer; along the sidewalls and in the bottom of the contact opening. A third conductive layer is then formed over the second conductive layer wherein the third conductive layer does not fill the contact opening. The second and third conductive layers are etched to form an interconnect substantially over the contact opening.
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IBM TDB, vol. 30 No. 10, Mar. 1988, Reliable Tungsten Chemical Vapor Deposition Process with Sputter Etch to Form Contact Studs, pp. 162, 163.
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IBM Technical Disclosure Bulletin, vol. 22, No. 8A, Jan. 1980, Nitride-Limited Schottky Barrier Diode Design, F. H. Gaenssien, pp. 3397-3398.
Chen Fusen E.
Dixit Girish A.
Miller Robert O.
Brown Peter Toby
Galanthay Theodore E.
Hill Kenneth C.
Jorgenson Lisa K.
SGS-Thomson Microelectronics Inc.
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