Static information storage and retrieval – Read/write circuit
Patent
1991-11-05
1992-09-29
Fears, Terrell W.
Static information storage and retrieval
Read/write circuit
365190, 365203, G11C 1300
Patent
active
051518783
ABSTRACT:
In a semiconductor memory device comprising memory cells in which first and second potentials correspond to the logic values "0" and "1", the first potential is closer to the second potential than the potential of unselected word lines, by 0.3 V or more. The pull-up transistor is of the N-type, and the pull-down transistor is of the P-type.
REFERENCES:
Kawamoto, H. et al., "A 288Kb CMOS Pseudo SRAM," IEEE International Solid-State Circuits Conference Article, pp. 276-277 (1984).
Takeshima, T. et al., "A 55ns 16Mb DRAM," IEEE International Solid-State Circuits Conference Article, pp. 246-247 (1989).
"Micro Computer Memory," pp. 137-156 (1985).
IEEE International Solid-State Conference "A 288 Kb. CMOS Pseudo SRAM" pp. 276-277, Kawamoto et al., Feb. 24, 1984.
IEEE International Solid-State Conference "A 55 ns 16Mb Dram" pp. 246-247 T. Takashima et al. Feb. 17, 1989.
Inoue Michihiro
Yamada Toshio
Fears Terrell W.
Matsushita Electric - Industrial Co., Ltd.
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