High integration semiconductor device

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

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257315, H01L 2976

Patent

active

058698620

ABSTRACT:
Control gate electrodes 12 are formed on field oxidation layers 19. Anisotropic etching is carried out by covering all the regions except for a source region by photo-resist layers 31 and using the control gate electrodes 12 as a mask. Concave parts 20 are formed in the inner side of the control gate electrodes 12 of the field oxidation layer 19. A source region 4b is formed by carrying out ion implantation. Drain regions 3 and a source region 4 are formed by removing the photo-resist layers 31, and by carrying out ion implantation using the control gate electrodes 12 as a mask. The source region is formed by removing a part of the isolation region positioned adjacently to the source region located in a peripheral part of the control gate electrodes 12. As a result, it is possible to reduce the distance between two of the control gate electrodes positioned adjacently as well as increasing integration level of the nonvolatile memory devices.

REFERENCES:
patent: 4807017 (1989-02-01), Ema et al.
patent: 5248891 (1993-09-01), Takato et al.
patent: 5556799 (1996-09-01), Hong

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