Tree decoder having two bit partitioning

Details Tree decoder having two bit partitioning Tree decoder having two bit partitioning

1991-10-02

1992-10-20

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307443, 307448, 307451, 307463, H03K 1716, H03K 1920

Patent

active

051572834

ABSTRACT:
Disclosed is a decoder circuit designed to reduce the number of transistor elements and to increase the speed of operation. The decoder includes a plurality of output selectors for respectively drawing out different decoded output signal lines in group having the common input components. In each output selector, a plurality of serial-connected transistors is provided to execute AND operations for the common input components, and a plurality of parallel-connected transistors to execute OR operation for the remaining and their remaining inverted input components. The final one of the serial-connected transistors is coupled to each of parallel-connected transistors, and thereby the entire AND operation results for the common inputs and remaining inputs, or for the common inputs and remaining inverted inputs is obtained at the predetermined one of the decoded output signal lines.

REFERENCES:
patent: 4433257 (1984-02-01), Kinoshita
patent: 4684829 (1987-08-01), Uratani
patent: 4724341 (1988-02-01), Yamada et al.
patent: 4725742 (1988-02-01), Tachimori et al.
patent: 4730133 (1988-03-01), Yoshida

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