Efficient generation of negative fill shapes for chips and packa

Details Efficient generation of negative fill shapes for chips and packa Efficient generation of negative fill shapes for chips and packa

1995-05-19

1997-09-23

Trans, Vincent N.

Boots, shoes, and leggings

364488, G06F 1750

Patent

active

056711522

ABSTRACT:
An efficient method for modifying a chip or package design allows for the creation of small shapes without excessive expansion of design data. A computer program takes a physical design, represented in a computer data file, and generates a modified version of the design in which fill holes have been added. Subsequently, when the modified design is processed, the resulting semiconductor chip or package will contain physical images of the added fill holes, with the effect of making local pattern density more uniform and hence reducing process-induced variations in feature size and shape.

REFERENCES:
patent: 4975854 (1990-12-01), Yabe
patent: 5251140 (1993-10-01), Chung et al.
patent: 5278105 (1994-01-01), Eden et al.
patent: 5416722 (1995-05-01), Edwards
patent: 5459093 (1995-10-01), Kuroda et al.

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