Semiconductor device with a vertical field effect transistor

Details Semiconductor device with a vertical field effect transistor Semiconductor device with a vertical field effect transistor

1995-08-24

1997-09-23

Ngo, Ngan V.

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257332, 257333, 257334, H01L 2976, H01L 2974, H01L 31062

Patent

active

056708106

ABSTRACT:
On a semiconductor substrate made of p-type silicon, there are formed, in a successively layered fashion, a first p-type silicon semiconductor layer, laterally paired first n-type silicon semiconductor layers, laterally paired second p-type silicon semiconductor layers, and laterally paired n-type silicon semiconductor layers, by an epitaxial growth method. On the second n-type silicon semiconductor layer on the right side, there are successively formed a third p-type silicon semiconductor layer, a third n-type silicon semiconductor layer and a fourth p-type silicon semiconductor layer. The left first n-type silicon semiconductor layer, left second p-type silicon semiconductor layer and left second n-type silicon semiconductor layer form a first insular multilayered portion forming an n-channel MOSFET. The third p-type silicon semiconductor layer, third n-type silicon semiconductor layer and fourth p-type silicon semiconductor layer form a second insular portion forming a p-channel MOSFET. A first gate electrode is formed on a side surface of the left second p-type silicon semiconductor layer with a gate insulating film therebetween, and a second gate electrode is formed on a side surface of the right third n-type silicon semiconductor layer with a gate insulating film therebetween.

REFERENCES:
patent: 4810906 (1989-03-01), Shah et al.
patent: 5016067 (1991-05-01), Mori
patent: 5072276 (1991-12-01), Malhi et al.
patent: 5311050 (1994-05-01), Nitayama et al.
H. Gossner et al., "Verticl Si-MOSFETs with Channel Lengths Down to 45nm" Extended Abstracts of the 1993 International Conference on Solid State Devices and Materials, Makuhari, 1993, pp.422-424.
H. Takato et al., "Impact of Surrounding Gate Transistor (SGT) for Ultra-High-Density LSI's", IEEE Transactions on Electron Devices, vol. 38, No. 3, Mar. 1991, pp. 573-578.
IBM Technical Disclosure Bulletin, vol. 10, No. 5, Oct. 5, 1997, pp. 653-654.

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