Semiconductor memory device

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

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Details

257307, 257308, H01L 27108, H01L 2976, H01L 2994, H01L 31119

Patent

active

056708068

ABSTRACT:
This invention relates to a semiconductor memory having stacked storage node, which comprises a semiconductor substrate, a memory cell transistor having gate pole and source and drain area formed on the semiconductor substrate, a capacitor storage node having an insulation film formed over the memory cell having a contact hole exposing a certain part of the source and drain area of the memory cell transistor, and a conductive side wall formed on the insulation film of the edge part on the upper part of the contact hole, multi-layer conductive stacked films horizontally extended to outer side of the contact hole and connected with one side of the conductive side wall, and an upper conduction layer formed along the inside surface of the contact hole and the conductive side wall to be connected to the source and drain of the transistor.

REFERENCES:
patent: 4536949 (1985-08-01), Takayama et al.
patent: 5063176 (1991-11-01), Lee et al.
patent: 5155657 (1992-10-01), Oehrlein et al.
patent: 5268322 (1993-12-01), Lee et al.
patent: 5294561 (1994-03-01), Tanigawa
patent: 5389560 (1995-02-01), Park

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