N channel output driver with boosted gate voltage

Electronic digital logic circuitry – Interface – Current driving

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Details

326 83, 326 27, 36518905, H03K 190185

Patent

active

055594522

ABSTRACT:
Disclosed is an output circuit capable of improving the load driving performance of a semiconductor device. The output circuit has first and second N channel MOS transistors connected in series between a high-potential power supply and a low-potential power supply. Both transistors produce an output signal at a node therebetween in response to complementary input signals. The output circuit includes a booster circuit, connected to the first transistor. The booster circuit is supplied with power from the high-potential power supply. In response to a clock signal and an input signal for enabling the first transistor, the booster circuit produces a voltage higher than the potential level of the high-potential power supply and applies the higher voltage to the first transistor.

REFERENCES:
patent: 4622479 (1986-11-01), Taylor
patent: 4692638 (1987-09-01), Stiegler
patent: 4736121 (1988-04-01), Cini et al.
patent: 4772812 (1988-09-01), Desmarais
patent: 4806798 (1989-02-01), Kanauchi
patent: 5081371 (1992-01-01), Wong
patent: 5170072 (1992-12-01), Ihara
patent: 5268600 (1993-12-01), Yeu

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