Circuit for improving picture quality by interpolation in a vide

Facsimile and static presentation processing – Facsimile – Recording apparatus

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358166, H04N 315

Patent

active

050499980

ABSTRACT:
A circuit and method for improving picture quality by interpolation in a digital video camera or in an image processing system. A preferred embodiment performs interpolation of a video signal from a CCD image pickup device. The circuit includes a first pitch (pixel) delay circuit 20, a 2-decimation circuit, a second pitch delay circuit 30 and a third pitch delay circuit 40. The circuit further includes a first adder and multiplier 50 connected to the outputs of the second pitch delay circuit and the 2-decimation circuit, a second adder and multiplier 60 connected to an output of the third pitch delay circuit and an output of the 2-decimation circuit and an adder 70 for combining the output of circuits 10, 50 and 60 to a clock signal. The adder 70 also samples the combined signal in response to the clock signal and holds the sampled signal for output of a picture signal of improve quality.

REFERENCES:
patent: 4789893 (1988-12-01), Weston
patent: 4862271 (1989-08-01), Smith et al.
patent: 4933766 (1990-06-01), de Haan et al.
patent: 4941186 (1990-07-01), Massmann et al.
patent: 4962542 (1990-10-01), Klees

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