Switching plane redundancy

Details Switching plane redundancy Switching plane redundancy

1985-08-28

1988-06-28

Moffitt, James W.

Static information storage and retrieval

Read/write circuit

Bad bit

G11C 700

Patent

active

047544341

ABSTRACT:
A memory comprising apparatus for selecting redundant rows of memory cells wherein the addressing of a defective regular row of memory cells coupled to a first set of bit lines results in the selection of a redundant row of memory cells coupled to a second set of bit lines such that signal interference resulting from the simultaneous enablement of two word lines in the memory is avoided.

REFERENCES:
patent: 4473895 (1984-09-01), Tatematsu
patent: 4535259 (1985-08-01), Smarandon
patent: 4599709 (1986-07-01), Clemons

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