Semiconductor memory device having voltage booster circuit

Details Semiconductor memory device having voltage booster circuit Semiconductor memory device having voltage booster circuit

1998-07-01

2000-05-30

Tran, Andrew Q.

Static information storage and retrieval

Read/write circuit

Including reference or bias voltage generator

36518911, 36518907, 365202, 365203, 365190, 365208, G11C 712

Patent

active

060698284

ABSTRACT:
An equalizing circuit is connected between a pair of bit lines. The equalizing circuit is made up of three MOS transistors and an equalization control signal is supplied to the gates of the MOS transistors. A sense amplifier circuit is connected to the bit lines. The sense amplifier circuit amplifies the potential difference occurring between the bit lines, for the detection of data. The equalization control signal is output from a level conversion circuit. An internal boosted voltage-generating circuit constantly generates a boosted voltage which is higher than an externally-applied power supply voltage applied to a power supply terminal. The boosted voltage is applied to the level conversion circuit. The level conversion circuit converts an input control signal, whose high-level voltage is equal to, or lower than the externally-applied power supply voltage, into the boosted voltage, thereby generating the equalization control signal.

REFERENCES:
patent: 5257232 (1993-10-01), Dhong et al.
patent: 5361237 (1994-11-01), Chishiki
patent: 5375086 (1994-12-01), Wahlstrom
patent: 5412604 (1995-05-01), Fukuda et al.

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