Semiconductor memory device having storage nodes doped with firs

Static information storage and retrieval – Systems using particular element – Capacitors

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Other Related Categories

365182, G11C 1124

Type

Patent

Status

active

Patent number

060698187

Description

ABSTRACT:
A first impurity is implanted into source-drain regions of a first type of MOS transistor, a second impurity is implanted into source-drain regions of a second type of MOS transistor, and both first and second impurities are implanted into data storage nodes, whereby a double-layer structure is formed. The source-drain regions of the respective MOS transistors are further doped with another kind of impurity. Thus, a semiconductor memory device is provided which is free of depletion layer induced leak currents, the depletion layer being restrained to extend to the substrate surface by the impurity profile of the data storage nodes.

REFERENCES:
patent: 5250832 (1993-10-01), Murai
patent: 5323343 (1994-06-01), Ogoh et al.
patent: 5716862 (1998-02-01), Ahmad et al.

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