Semiconductor device with high integration density and improved

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

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257204, 257303, 257306, 257 68, 257 71, 257296, H01L 2710, H01L 27108, H01L 2976, H01L 2994

Patent

active

060256230

ABSTRACT:
In a stack type memory cell of 8F.sup.2, bit line plug electrodes for connecting bit lines to source/drain diffusion layers of active regions in an area between two word lines WL are formed extend from the source/drain diffusion layers in parallel to the word lines WL and formed longer than the minimum element isolation width F and shorter than three times the minimum element isolation width F. Thus, a DRAM which uses stack type memory cells and whose integration density can be easily enhanced can be attained.

REFERENCES:
patent: 5568422 (1996-10-01), Fujiwara
patent: 5661340 (1997-08-01), Ema et al.
patent: 5689120 (1997-11-01), Narita
patent: 5747844 (1998-05-01), Aoki et al.
patent: 5748521 (1998-05-01), Lee
patent: 5821592 (1998-10-01), Hoenigschmid et al.

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