Transistor useful for further vertical integration and method of

Details Transistor useful for further vertical integration and method of Transistor useful for further vertical integration and method of

1992-03-02

1993-10-12

James, Andrew J.

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257378, 257368, 257526, 257566, 257586, H01L 2910, H01L 2972

Patent

active

052528499

ABSTRACT:
A transistor is formed as either a bipolar transistor (10) or an MOS transistor (11). Each transistor (10 or 11) has a substrate (12). Bipolar transistor (10) has a first current electrode (26) underlying a control electrode (28), and a second current electrode (32) overlying the control electrode (28). MOS transistor (11) has a first current electrode (54) underlying a channel region (56), and a source lightly doped region (58) and a source heavily doped region (60) overlying the channel region (56). A control electrode conductive layer (40) is laterally adjacent a sidewall dielectric layer (48), and sidewall dielectric layer (48) is laterally adjacent channel region (56). Conductive layer (40) functions as a gate electrode for transistor (11). Each of the transistors (10 and 11) is vertically integrated such as in a vertically integrated BiMOS circuit. Transistors (10 and 11) can be electrically isolated by isolation ( 64 and 66).

REFERENCES:
patent: 2898454 (1959-08-01), Loughlin
patent: 4554570 (1985-11-01), Jastrzebski et al.
patent: 4740826 (1988-04-01), Chatterjee
patent: 4849371 (1989-07-01), Hansen et al.
patent: 4851362 (1989-07-01), Suzuki
patent: 4902641 (1990-02-01), Koury, Jr.
patent: 5096844 (1992-03-01), Konig et al.
Drangeid, "High-Speed Field Effect Structure", IBM Technical Disclosure Bulletin, Aug. 1968, vol. 11, No. 3, pp. 332-333.
"Impact of Surrounding Gate Transistor (SGT) for Ultra-High-Density LSI's", by Hiroshi Takato et al., was published in IEEE Trans. on Electron Devices, vol. 38, No. 3, Mar. 1991, pp. 573-577.

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