Flash E.sup.2 PROM cell structure with poly floating and control

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

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H01L 29788

Patent

active

057808929

ABSTRACT:
A floating gate E.sup.2 PROM cell is provided with a poly silicon floating gate having a pointed, sloped edge. A poly oxide is disposed on the pointed, sloped edge of the floating gate. A select gate is disposed on the poly oxide. The select gate overlaps the pointed, sloped edge of the floating gate. The floating gate, poly oxide, and select gate cooperate so that electrons tunnel according to enhanced Fowler Nordheim tunnelling from a point of the pointed, sloped edge of the floating gate, through the poly oxide and into the select gate.
A simple process is also provided for fabricating an E.sup.2 PROM cell including the step of forming a nitride layer on a poly silicon layer. The nitride layer is patterned, using a photo-lithographic technique, to form an exposed poly silicon layer surface window. The exposed surface window of the poly silicon layer is then oxidized using a LOCOS (local oxidation of silicon) process to form a poly oxide region. The poly oxide region thus formed has a tapered edge which is adjacent to a pointed, sloped edge of a remaining non-oxidized poly silicon floating gate region of the poly silicon layer. A poly oxide layer is then formed on the poly silicon floating gate region. A select gate is then formed on the poly oxide layer so that it overlaps the pointed, sloped edge of the poly silicon floating gate.

REFERENCES:
patent: 4274012 (1981-06-01), Simko
patent: 5461249 (1995-10-01), Ozara
patent: 5591652 (1997-01-01), Matsushita
patent: 5633184 (1997-05-01), Tamura et al.
H.E. Maes, J. Withers & G. Groeseneken, "Trends in Non-Volatile Memory Devices and Technologies", Solid State Devices, pp. 157-168 (1988). no month.

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