High density flash memory cell and method of forming a line of f

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

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257366, H01L 29788

Patent

active

057214417

ABSTRACT:
A method of forming a line for floating gate transistors is described and which includes, providing a substrate having a plurality of discrete field oxide regions, and intervening active area regions therebetween; forming a first alternating series of floating gates over a first alternating series of active area regions; forming a second alternating series of floating gates over a second alternating series of active area regions, the second series of floating gates disposed in spaced, overlapping and partial covering relation relative to the first alternating series of floating gates; forming a layer of dielectric material over the first and second series of floating gates; and forming a control gate layer of electrically conductive material over the layer of dielectric material. The present invention further relates to a memory chip, and die having a line of floating gate transistors formed from the same method.

REFERENCES:
patent: 5107313 (1992-04-01), Kohda et al.
patent: 5610419 (1997-03-01), Tanaka

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