SRAM cell having load thin film transistors

Details SRAM cell having load thin film transistors SRAM cell having load thin film transistors

1995-07-05

1996-07-09

Nelms, David C.

Static information storage and retrieval

Systems using particular element

Flip-flop

365156, 257393, 257903, G11C 110, H01L 2702

Patent

active

055351557

ABSTRACT:
In a static random access memory device including a flip-flop having first and second load thin film transistors whose drains are connected via first and second transfer bulk transistors to first and second bit lines, respectively, the second bit line is arranged over the first load thin film transistor, and the first bit line is arranged over the second load thin film transistor.

REFERENCES:
patent: 5281843 (1994-01-01), Ochii et al.
patent: 5309010 (1994-05-01), Kitajima
patent: 5384731 (1995-01-01), Kuriyama et al.
patent: 5404326 (1995-04-01), Okamoto
patent: 5438537 (1995-08-01), Sasaki
Ohkubo et al; "16 Mbit SRAM Cell Technologies for 2.0 V Operation"; Dec. 8, 1991; pp. 91, 482-484; IEEE Publishers.
Sasaki et al, A 23-ns 4-Mb CMOS SRAM with 0.2-uA Standby Current, IEEE Journal of Solid-State Circuits, vol. 25, No. 5, pp. 1075-1081, Oct. 1990.

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