Multi-stage ECL-to-CMOS converter with wide dynamic range and hi

Details Multi-stage ECL-to-CMOS converter with wide dynamic range and hi Multi-stage ECL-to-CMOS converter with wide dynamic range and hi

1997-01-14

1998-05-19

Westin, Edward P.

Electronic digital logic circuitry

Interface

Logic level shifting

360 67, 326 63, H03K 19018

Patent

active

057540594

ABSTRACT:
A circuit for converting received input signals to highly symmetrical CMOS level outputs having fast slew rates. The circuit can accept a differential input signal with a wide range of common mode voltages. A first stage level shifts the input signals to provide a ground-based common mode output to a second stage level shifter which centers the input signals around the midpoint between V.sub.cc and ground and which increases their voltage swing. The final stage provides a full, highly symmetric, rail-to-rail output capable of driving highly capacitive loads at high rates and which is immune to temperature, V.sub.cc, and process variations.

REFERENCES:
patent: 4906871 (1990-03-01), Iida
patent: 5327298 (1994-07-01), Ottensen et al.
patent: 5459412 (1995-10-01), Mentzer
patent: 5606464 (1997-02-01), Agazzi et al.

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