Semiconductor integrated circuit device

Details Semiconductor integrated circuit device Semiconductor integrated circuit device

1997-03-25

2000-06-20

Abraham, Fetsum

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257296, 257297, 257390, 257392, H01L 27108

Patent

active

060780843

ABSTRACT:
A semiconductor integrated circuit device includes in a P-type well region containing a memory substrate a array section in which dynamic memory cells are arranged in a matrix. The P-type well region is fed with a back bias voltage whose absolute value is reduced so as to be the most suitable for the refresh characteristics. Also included is a P-well region wherein there are formed N-channel MOSFETs of a peripheral circuit this P-well region is fed with a back bias voltage whose absolute value is smaller than that of the potential fed to the P-type well of the memory array section, considering the high-speed operation. A P-type well section, wherein there is formed are N-channel MOSFETs of an input circuit or an output circuit connected with external terminals, is fed with a back bias voltage whose absolute value is made large considering an undershoot voltage. The P-type well region provided with the memory array section is fed with a requisite minimum back bias voltage. Accordingly, the P-type well region provided with the input circuit or the output circuit corresponding to the external terminals is fed with the back bias voltage to provide a measure of protection against undershoot, while the refresh characteristics are improved by reducing the leakage current between the source/drain region connected with a capacitor and the P-type well, to thereby raise the operation speed of the peripheral circuit can be raised.

REFERENCES:
patent: 5079613 (1992-01-01), Sawada et al.
patent: 5148255 (1992-09-01), Nakazato et al.
patent: 5654577 (1997-08-01), Nakamura et al.

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