Wordline driver circuit for EEPROM memory cell

Details Wordline driver circuit for EEPROM memory cell Wordline driver circuit for EEPROM memory cell

1992-06-29

1993-11-23

Clawson, Jr., Joseph E.

Static information storage and retrieval

Read/write circuit

Including reference or bias voltage generator

365185, 36518911, 365218, 36523006, 365226, G11C 700

Patent

active

052650529

ABSTRACT:
A circuit for applying reading, programming and erasing voltages to a wordline in a floating-gate-type EEPROM cell array comprising a positive voltage switching circuit, a first isolating transistor, and a second isolating transistor. The positive voltage switching circuit may include an inverter with feedback transistor and a third isolating transistor. In one embodiment, the positive voltage switching circuit is capable of switching up to three positive voltage values and reference voltage to the wordline terminal.

REFERENCES:
patent: 4499388 (1985-02-01), Adam
patent: 4565932 (1986-01-01), Kuo et al.
patent: 4694430 (1987-09-01), Rosier
patent: 4720816 (1988-01-01), Matsuoka et al.
patent: 4733375 (1988-03-01), Terashima
patent: 4737936 (1988-04-01), Takeuchi
patent: 4742492 (1988-05-01), Smayling et al.
patent: 4761764 (1988-08-01), Watnabe
patent: 4823318 (1989-04-01), D'Arrigo et al.
patent: 4893275 (1990-01-01), Tanaka et al.
patent: 5136541 (1992-08-01), Arakawa

Affiliated with

Also associated with

Rating

Wordline driver circuit for EEPROM memory cell does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Wordline driver circuit for EEPROM memory cell, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Wordline driver circuit for EEPROM memory cell will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1854979