Modified implementation of air-gap low-K dielectric for unlanded

Details Modified implementation of air-gap low-K dielectric for unlanded Modified implementation of air-gap low-K dielectric for unlanded

1999-09-03

2000-06-20

Bowers, Charles

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

438624, 438763, 438422, H01L 214763, H01L 2131

Patent

active

060777672

ABSTRACT:
A method for fabricating a multilevel interconnect, where a first and a second conducting wires are formed respectively on a substrate, while a part of the substrate between the first and the second conducting wires is exposed. A first dielectric layer is then formed to cover the substrate as well as the first and the second conducting wires, wherein the first dielectric layer has an air gap formed between the first and the second conducting wires. An anti-etch layer is formed on the first dielectric layer above the air gap, while a second dielectric layer is then formed on the anti-etch layer and the first dielectric layer. A via opening which exposes the first conducting wire is then formed by etching, followed by forming a barrier layer which covers the profile of the via opening and the exposed surface of the first conducting layer. Consequently, a via plug is formed to fill the via opening.

REFERENCES:
patent: 5814555 (1998-09-01), Bandyopadhyay et al.

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