Multi-chips semiconductor package and fabrication method

Details Multi-chips semiconductor package and fabrication method Multi-chips semiconductor package and fabrication method

1998-09-05

2000-06-20

Fahmy, Wael

Semiconductor device manufacturing: process

Packaging or treatment of packaged semiconductor

Assembly of plural semiconductive substrates each possessing...

438109, 438108, 438123, 438611, 438613, 257777, 257723, 257738, 257780, H01L 2144, H01L 2148, H01L 2150, H01L 2940, H01L 2348

Patent

active

060777249

ABSTRACT:
A multi-chips semiconductor package and fabrication method mainly combines LOC and BGA techniques to overlap one chip upon another chip in an IC component package. One chip uses leads of a lead frame as connection interface of the circuit in the chip to outside. Another chip uses solder balls as connection interface of the circuit in another chip to outside. The two chips are supported by the lead frame without a substrate used in a conventional BGA package. The two chips may have same or different function. The structure is simple and easy to produce at low cost. The size and length of the IC component is smaller than the one produced by conventional multi-chips packaging techniques.

REFERENCES:
patent: 5422435 (1995-06-01), Takiar et al.
patent: 5527740 (1996-06-01), Golwalkar et al.
patent: 5715593 (1998-02-01), Kimura
patent: 5963430 (1999-10-01), Londa

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