MOS output driver, and circuit and method of controlling same

Details MOS output driver, and circuit and method of controlling same MOS output driver, and circuit and method of controlling same

1997-09-29

2000-05-23

Tokar, Michael

Electronic digital logic circuitry

Interface

Current driving

326 86, 326121, 326 17, H03K 190175

Patent

active

060669632

ABSTRACT:
A circuit and method for providing a fast transitioning output buffer that may be configured to operate using either a 3 volt or 5 volt supply voltage. The pullup behaves similarly to a MOS diode, but the circuit lowers the gate voltage on a pullup while the output is being pulled up. The circuit does not affect the final pullup voltage. As a result, a single PMOS device may be used as a pullup device that does not generally require an increased size to support a high operating voltage.

REFERENCES:
patent: 5381055 (1995-01-01), Lai et al.
P. Xu, U.S.S.N. 08/635,022, Low Noise 3V/5V CMOS Bias Circuit, Filed Apr. 1, 1996.

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