Semiconductor integrated circuit device and process for manufact

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

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257385, 257903, H01L 21225

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active

058474340

ABSTRACT:
A semiconductor integrated circuit device is provided which includes a memory cell M, in which a capacitance element C is added to the storage node portion of an inverter circuit composed of a drive MOSFET and a load TFT Qf. The device also includes and a bipolar transistor Tr provided as a peripheral element. A reference power supply line to be connected with the source region of the drive MOSFET Qd and an emitter electrode to be connected with the emitter region of the bipolar transistor Tr are formed of an uppermost thick polycrystal silicon film. Moreover, an intermediate thin polycrystal silicon film between the uppermost polycrystal silicon film and a first polycrystal silicon film (or polycide film) is covered in a memory cell forming region with the uppermost polycrystal silicon film. Still moreover, the uppermost polycrystal silicon film is partially silicified.

REFERENCES:
patent: 4841481 (1989-06-01), Ikeda et al.
patent: 5194749 (1993-03-01), Meguro et al.
patent: 5321650 (1994-06-01), Kikuchi et al.
patent: 5717240 (1998-02-01), Kuriyama et al.
patent: 5731232 (1998-03-01), Wuu et al.
"A Split Wordline Cell For 16Mb SRAM Using Polysilicon Sidewall Contacts" by Kazuo Itabashi, et al, (1991) pp. 477-480.
"A Stacked Emitter Polysilicon (STEP) Bipolar Technology for 16 Mbit BiCMOS SRAMs" by Hisamitsu Suzuki, et al., vol. 34, (1993) pp. 57-62.

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