Semiconductor having polycrystalline silicon sandwiched by semic

Details Semiconductor having polycrystalline silicon sandwiched by semic Semiconductor having polycrystalline silicon sandwiched by semic

1995-09-28

1997-12-23

Brown, Peter Toby

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257384, 257385, 257588, 257755, 257756, 257775, H01L 2943, H01L 2945

Patent

active

057010293

ABSTRACT:
In a semiconductor device including a semiconductor substrate, an impurity doped region formed in the semiconductor substrate, an insulating layer formed on the semiconductor substrate and having an opening leading to the impurity doped region, a polycrystalline silicon layer formed on the insulating layer and the impurity doped region, and a metal silicide layer formed on the polycrystalline silicon layer, a transverse thickness of the polycrystalline silicon layer at a sidewall of the insulating layer is larger than a longitudinal thickness of the polycrystalline silicon layer at a bottom of the opening and at a surface of the insulating layer.

REFERENCES:
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patent: 4975381 (1990-12-01), Taka et al.
patent: 5137840 (1992-08-01), Desilets et al.
H. Miyanaga et al., "A 0.85 ns 1Kb Bipolar ECL RAM", 16th Conference on Solid State Devices and Materials, pp. 225-228 (1984).
T. Nakamura et al., "Ultra High Speed Bipolar Device-SICOS", 18th International Conference on Solid State Devices and Materials pp. 279-282 (1986).
C. Chang, "Formation of PtSi in the presence of W and AI", J. Appl. Physics 63(1): 236-238 (1988).
Y. Okita et al., "A Novel Base-emitter Self-alignment Process for High Speed Bipolar LSIS", Proc. of the IEEE 1988 Custom Integrated Circuits Conference pp. 22.4.1-22.4.4(1988).
P. Zdebel et al., "MOSAIC III-A High Performance Bioplar Technology with Advanced Self-aligned Devices", Proc. of the 1987 Bipolar Circuits and Technology Meeting pp. 172-175 (1987).

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