Single-chip data processor handling synchronous and asynchronous

Details Single-chip data processor handling synchronous and asynchronous Single-chip data processor handling synchronous and asynchronous

1995-09-07

2000-03-14

Follansbee, John A.

Electrical computers and digital processing systems: processing

Processing control

Branching

710269, G06F 930

Patent

active

060386614

ABSTRACT:
A vector point of an exception handler related to TLB miss exception events is obtained by reading a vector base address of a register VBR one time, and by adding a vector offset (H'400) thereto. A vector point of an exception handler related to exception events other than the TLB miss exception events is obtained by adding a vector offset to a value (vector base address) of the register VBR, and an exception code which is an address offset obtained by reading a value of the register EXPEVT or INTEVT one time is added to the vector point that is obtained. Thus, the processing is branched to a required exception handler to execute the exception event processing related to exception events other than the TLB miss exception events.

REFERENCES:
patent: 4768149 (1988-08-01), Konopik et al.
patent: 5109329 (1992-04-01), Strelioff
patent: 5155853 (1992-10-01), Mitsuhira et al.
patent: 5214793 (1993-05-01), Conway et al.
patent: 5349667 (1994-09-01), Kaneko
patent: 5386563 (1995-01-01), Thomas
patent: 5448705 (1995-09-01), Nguyen et al.
patent: 5450560 (1995-09-01), Bridges et al.
patent: 5481685 (1996-01-01), Nguyen et al.
patent: 5557764 (1996-09-01), Stewart et al.
patent: 5574872 (1996-11-01), Rotern et al.
patent: 5634130 (1997-05-01), Lee
Microcomputer Handbook, Edited by Shigeru Watanabe, et al., pp. 177-178.

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