Method and system for assigning cache memory utilization within

Details Method and system for assigning cache memory utilization within Method and system for assigning cache memory utilization within

1997-12-17

2000-03-14

Chan, Eddie P.

Electrical computers and digital processing systems: memory

Storage accessing and control

Hierarchical memories

711121, 711145, G06F 1200

Patent

active

060386428

ABSTRACT:
A method and system for enhancing cache memory utilization within a symmetric multiprocessor data-processing system are disclosed. The symmetric multiprocessor data-processing system includes several processing units. These processing units are typically coupled to a system memory via an interconnect. Each of the processing units includes at least one cache memory for storing a subset of data contained within the system memory. Each of the processing units also includes a cache controller for controlling its associated cache memory. Each cache controller includes a mode select to allow an associated cache memory to be selectively operated under a shared mode or a private mode.

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