Method and apparatus to achieve fast suspend in flash memories

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition

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711154, 36518529, G06F 1318

Patent

active

060818700

ABSTRACT:
A state machine and its associated method for achieving a faster response time for an interruption of an erase operation is disclosed. In particular, a state machine having a plurality of interconnected execution cycles is disclosed. The execution cycles include incremental cycles and other cycles. The state machine also includes a plurality of suspend cycles. Each suspend cycle is connected directly to one of the execution cycles. At least one of the suspend cycles is connected directly to one of the other cycles.

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