Microprocessor with a core that operates at multiple frequencies

Details Microprocessor with a core that operates at multiple frequencies Microprocessor with a core that operates at multiple frequencies

1993-03-24

1996-07-16

Kriess, Kevin A.

Boots, shoes, and leggings

364270, 3642702, 3642731, 364DIG1, G06F 108

Patent

active

055375812

ABSTRACT:
A microprocessor that operates at the speed of the bus or at a speed which is a multiple of the bus speed on a selectable basis. The microprocessor includes a phase locked loop to generate clock signals to clock the operations within the microprocessor and bus clock signals to clock data transfer operations between the microprocessor and the bus.

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Shanley et al., "ISA System Architecture", 1991, pp. 1-4 and 17-23.

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