Semiconductor memory having a refresh operation cycle and operat

Details Semiconductor memory having a refresh operation cycle and operat Semiconductor memory having a refresh operation cycle and operat

1995-07-18

1998-02-17

Popek, Joseph A.

Static information storage and retrieval

Read/write circuit

Data refresh

365149, 365 63, 365 51, G11C 700

Patent

active

057198152

ABSTRACT:
An ordinary read/write operation (normal operation) and a refresh operation are separated from one another and the number of read amplification circuits or, in other words, the number of sense amplifiers operating during the normal operation is made smaller than that during the refresh operation. Accordingly, a bit line charge/discharge current during the normal operation can be reduced.

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