CMOS logic circuit with plural inputs

Details CMOS logic circuit with plural inputs CMOS logic circuit with plural inputs

1994-12-20

1996-07-16

Westin, Edward P.

Electronic digital logic circuitry

Clocking or synchronizing of logic stages or gates

Field-effect transistor

326121, H03K 19096, H03K 19094

Patent

active

055370632

ABSTRACT:
There is provided a CMOS logic circuit designed in a manner to have preference to either operation speed or power consumption. This CMOS logic circuit comprises a first circuit assembly including a plurality of N number of P-channel type MOS transistors, a second circuit assembly including N-number of N-channel type MOS transistors, and a switching element operative so that ON/OFF state is switched by a clock signal inputted from the external. The first and second circuit assemblies and the switching element are connected in series, e.g., between power supply voltage terminal and the ground terminal.

REFERENCES:
patent: 3925685 (1975-12-01), Suzuki
patent: 4661728 (1987-04-01), Kashimra
patent: 4734597 (1988-03-01), Ullrich et al.
patent: 4804868 (1989-02-01), Masuda et al.
patent: 5034629 (1991-07-01), Kinugasa et al.
Mark G. Johnson, "Special Correspondence: A Symmetric CMOS Nor Gate for High-Speed Applications", IEEE Journ. Solid-State Circuits, vol. 23, No. 5, 1988, pp. 1233-1236.

Affiliated with

Also associated with

Rating

CMOS logic circuit with plural inputs does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with CMOS logic circuit with plural inputs, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and CMOS logic circuit with plural inputs will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1787291