Semiconductor memory comprising a memory cell without a transist

Details Semiconductor memory comprising a memory cell without a transist Semiconductor memory comprising a memory cell without a transist

1994-07-25

1995-10-31

Ngo, Ngan V.

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257306, 257311, 257317, 257318, 257319, 257320, 257321, 257535, H01L 2968, H01L 2978, H01L 2992, H01L 2702

Patent

active

054632358

ABSTRACT:
A semiconductor memory includes a laminated structure including a first word line in a p-type silicon substrate, a first silicon oxide film on the word line, a bit line, a tunnel oxide film, a storage node of polycrystalline silicon containing impurities, a second silicon oxide film, and a second word line of polycrystalline silicon, wherein the dielectric constant or area of the tunnel oxide film is smaller than the dielectric constant or area of the first silicon oxide film and smaller than the dielectric constant or the area of the second silicon oxide film. With this arrangement, the memory cell structure can be extremely simple. It is possible to reduce the number of production steps and, therefore, it is also possible to improve production yield. The present invention provides a high-density, high-performance, and low cost semiconductor memory.

REFERENCES:
patent: 4375085 (1983-02-01), Grisc et al.
patent: 4914546 (1990-04-01), Altar
patent: 5300799 (1994-04-01), Nakamura et al.
Sakao et al, "A Capacitor-Over-Bit-Line (COB) Cell with a Hemispherical-Grain Storage Node for 64Mb DRAMs", IEEE--IEDM 90-655 pp. 27.3.1-27.3.4.

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