Adhesive bonding and miscellaneous chemical manufacture – Delaminating processes adapted for specified product – Delaminating in preparation for post processing recycling step
Patent
1983-05-02
1984-09-25
Massie, Jerome W.
Adhesive bonding and miscellaneous chemical manufacture
Delaminating processes adapted for specified product
Delaminating in preparation for post processing recycling step
156656, 156657, 156662, 204192E, 252 791, H01L 2128, H01L 21308
Patent
active
044734360
ABSTRACT:
The invention provides a method of producing structures from double layers composed of a metal silicide (4) and polysilicon (3) on a silicon substrate (1) containing integrated semiconductor circuits in an operational plate reactor by reactive ion etching and with the use of a photosensitive resist mask (5) on the double layer to define desired structures. The plate reactor is provided with a controlled reactive gas mixture which contains fluorine and chlorine. The double layer (3, 4) in preferred embodiments is composed of a tantalum silicide layer and a polysilicon layer. An insulating layer (2) can be provided between the substrate and the double layer. The invention is useful for providing low-resistant interconnects in VLSI circuits.
REFERENCES:
patent: 4128670 (1978-12-01), Gaensslen
patent: 4203800 (1980-05-01), Kitcher et al.
patent: 4211601 (1980-07-01), Mogab
patent: 4214946 (1980-07-01), Forget et al.
patent: 4360414 (1982-11-01), Beinvogl
patent: 4380489 (1983-04-01), Beinvogl et al.
patent: 4383885 (1983-05-01), Maydan et al.
patent: 4384938 (1983-05-01), Desilets et al.
patent: 4411734 (1983-10-01), Maa
patent: 4414057 (1983-11-01), Bourassa et al.
Murarka et al., "Refractory . . . Interconnects" IEEE J. of Solid-State Circuits, vol. SC15 No. 4, (8/80) pp. 474-482.
Tsai et al. "One-Micron . . . Technology" J. Electrochem. Soc. vol. 128 No. 10, (10/81) pp. 2207-2214.
Eisele, "SF.sub.6, . . . Silicon" J. Electrochem. Soc., vol 128, No. 1, (1/81) pp. 123-126.
S. P. Murarka, "Refractory Silicides for Integrated Circuits", J. Vac. Sci. Technol., vol. 17, No. 4, (1980) pp. 775-788.
D. B. Fraser et al., "Tantalum Silicide/Polycrystalline Silicon-High Conductivity Gates for CMOS LSI Application", J. Vac. Sci. Technol., vol. 18, No. 2, (1981) pp. 345-346.
Massie Jerome W.
Siemens Aktiengesellschaft
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