MOS-type semiconductor integrated circuit device

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

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257330, 257343, 257369, H01L 2926

Patent

active

052586359

ABSTRACT:
A MOS-type semiconductor integrated circuit device is provided in which MOS transistors are formed in a vertical configuration. The MOS transistors are constituted by pillar layers formed on the substrate. The outer circumferential surfaces of the pillar layers are utilized to form the gates of the MOS transistors. Thus, large gate widths thereof can be obtained within a small area. As a result, the total chip area of the MOS transistors can be significantly reduced while maintaining a prescribed current-carrying capacity.

REFERENCES:
patent: 4568958 (1986-02-01), Baliga
patent: 4630088 (1986-12-01), Ogura et al.
patent: 4651184 (1987-03-01), Malhi
patent: 4670768 (1987-06-01), Sunami et al.
patent: 4672410 (1987-06-01), Miura et al.
patent: 4829358 (1989-05-01), Tamazaki
patent: 4851889 (1989-07-01), Matsuzaki
patent: 4920397 (1990-04-01), Ishijima
patent: 4941030 (1990-07-01), Majumdar
Sze, "Semiconductor Device", pp. 479 and 493, 1985.

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