Presettable semiconductor memory device

Details Presettable semiconductor memory device Presettable semiconductor memory device

1998-10-26

2000-03-14

Nelms, David

Static information storage and retrieval

Read/write circuit

G11C 1604

Patent

active

060381760

ABSTRACT:
To configure a semiconductor memory device for presetting to a particular value without the need to write into each cell of a memory cell array, at least one controller is provided to address the array. The controller is responsive to preset, write and read control signals, and determines whether to keep an asserted state on a corresponding address select line of the array, or to force the corresponding address select line to a non-asserted state. Within the controller, at least one flag register is employed to indicate that a write operation has occurred for a corresponding word of the array. The flag register can be reset by means of the preset control signal. The controller will keep the asserted state on the corresponding address select line whenever the write control signal is asserted, and force the corresponding address select line to the non-asserted state when the read control signal is asserted and the corresponding address is not flagged. The controller further keeps the asserted state on the address select line when the flagged address is read. A setting cell is enabled by an enabling circuit when all the address select lines of the array are in the non-asserted state during a read cycle to output a fixed preset logic state.

REFERENCES:
patent: 5875131 (1999-02-01), Shyu

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