Semiconductor integrated circuit device having wells biased with

Details Semiconductor integrated circuit device having wells biased with Semiconductor integrated circuit device having wells biased with

1992-04-30

1994-02-22

Munson, Gene M.

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257234, 257248, 257491, H01L 2704, H01L 2978, H01L 29796, H01L 2990

Patent

active

052890295

ABSTRACT:
A semiconductor integrated circuit device is fabricated on a lightly doped n-type substrate, and p-type wells are formed in the silicon wherein a heavily doped n-type channel stopper is formed in a surface portion between the p-type wells for restricting a parasitic channel between the p-type wells, and the surface portion is doped at a predetermined impurity concentration larger than a remaining portion of the silicon substrate and smaller than the channel stopper so that a p-n junction hardly takes place between the inverted surface portion and the channel stopper.

REFERENCES:
patent: 4458262 (1984-07-01), Chao
patent: 4654865 (1987-03-01), Sunazuka et al.

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