Semiconductor memory device having dummy word lines and method f

Details Semiconductor memory device having dummy word lines and method f Semiconductor memory device having dummy word lines and method f

1996-06-11

1998-06-16

Nelms, David C.

Static information storage and retrieval

Read/write circuit

Differential sensing

365149, G11C 700

Patent

active

057682046

ABSTRACT:
Memory cells and a sense amplifier are connected to a pair of bit lines. Two dummy word lines are capacitively coupled with the pair of bit lines. One of the dummy word lines is driven to a high level before the sense amplifier starts the sense operation, and the other dummy word line is driven to a high level after the sense amplifier has started the sense operation. When the sense amplifier has terminated the sense operation, the two dummy word lines are driven to a low level.

REFERENCES:
patent: 4977542 (1990-12-01), Matsuda et al.
patent: 5307315 (1994-04-01), Oowaki et al.
patent: 5377152 (1994-12-01), Kushiyama et al.
patent: 5418750 (1995-05-01), Shiratake et al.

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