Semiconductor memory device with ferroelectric capacitor

Details Semiconductor memory device with ferroelectric capacitor Semiconductor memory device with ferroelectric capacitor

1996-08-06

1998-06-16

Whitehead, Carl W.

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257296, 257300, 257305, 257307, H01L 2976

Patent

active

057675414

ABSTRACT:
A method of manufacturing a semiconductor storage device having a plurality of memory cells each having one transistor and one ferroelectric capacitor includes the steps of: forming a transistor; forming a plate line; sequentially laminating three layers including a first conductive film, a ferroelectric layer, and a second conductive layer stacked in this order; and sequentially etching the three layers by using a single etching mask. It is possible to maintain the contact surface between the electrodes and ferroelectric layer of a ferroelectric capacitor clean and the characteristics of the ferroelectric capacitor of the semiconductor storage device can be improved.

REFERENCES:
S. Onishi, et al., "A Half-Micron Ferroelectric Memory Cell Technology With Stacked Capacitor Structure", IEDM 94-843, pp. 34.4.1 -34.4.4.
N. Tanabe, et al., "A Ferroelectric Capacitor Over Bit-Line (F-COB) Cell for High Density Nonvolatile Ferroelectric Memories", 1995 Symposium on VLSI Technology Digest of Technical Papers, pp. 123-124.
H. Yoshimori, et al., "Development of Ferroelectric Memory Device", Technical Report of the Institute of Electronics Information and Communication Engineers, SDM93-137, ICD93-131, (1993-11), pp. 61-67.

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